Description: Position: PCIe Validation Engineer Location: San Diego, CA Exp: 5-8 years PCIe Gen 4/5/6, CXL, RISC ... Take lead responsibility for validating PCIe and its subsystems on multiple ...
6 days ago
Description: DivIHN (pronounced divine ) is a CMMI ML3-certified Technology and Talent solutions firm. Driven by a unique Purpose, Culture, and Value Delivery Model, we enable meaningful connections between talented professionals and forward-thinking ...
11 days ago
Description: Position: System Level Test Engineer Location: San Diego, USA Key ... , bench testing, TPUs, CPUs, GPUs, PCIe, Ethernet , C#, C/C++, PERL, Python, .NET framework ... , Fuse programming Own design and validation of System Level Test from ...
12 days ago
Description: Position: System Level Test Engineer Location: San Diego, USA Duration: ... , bench testing, TPUs, CPUs, GPUs, PCIe, Ethernet, C#, C/C++, PERL, Python, .NET ... provisioning, Fuse programmingOwn design and validation of System Level Test from ...
15 days ago
Description: Position: System Level Test Engineer Location: San Diego, USA Duration: ... , bench testing, TPUs, CPUs, GPUs, PCIe, Ethernet, C#, C/C++, PERL, Python, .NET framework ... , Fuse programming Own design and validation of System Level Test from ...
15 days ago
... Linux, RTOS); high-speed interfaces (PCIe and Ethernet); memory technologies: DDR3 ...
28 days ago
Description: Process Validation / Automation Engineer / CGT / On-Site / San Diego, ... responsibilities may include Computer Systems Validation (CSV) and i
15 days ago
... Level Test Engineer Location: San Diego, USA Own design and validation of ... with chip design and system validation teams to develop a test plan ...
7 days ago
... : Genesis10 is seeking a Sr. Test Engineer for a 6-month on-site contract ... intended for prototype, evaluation, and validation of product designs. This role ...
14 days ago
Description: Summary The ASIC Engineer is responsible for designing ASIC ... system) on architecture and system validation. Responsible for supporting our ASIC ...
7 days ago
Description: Summary The ASIC Engineer is responsible for designing ASIC ... system) on architecture and system validation. Responsible for supporting our ASIC ...
12 days ago
Description: Senior Network Hand & Feet Engineer (L2/L3 Physical & Logical Support) ... -end physical deployment and logical validation of network infrastructure. You will ...
25 days ago
... Job Description As the Senior Engineer in Software Quality Engineering, you ... to deliver quality centric V&V (Verification & Validation) testing Job Description W
28 days ago